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| MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MPC947/D Low Voltage 1:9 Clock Distribution Chip The MPC947 is a 1:9 low voltage clock distribution chip. The device features the capability to select between two LVTTL compatible inputs and fans the signal out to 9 LVCMOS or LVTTL compatible outputs. These 9 outputs were designed and optimized to drive 50 series terminated transmission lines. With output-to-output skews of 500ps, the MPC947 is ideal as a clock distribution chip for synchronous systems which need a tight level of skew at a relatively low cost. For a similar product targeted at a higher price/performance point, consult the MPC948 data sheet. MPC947 LOW VOLTAGE 1:9 CLOCK DISTRIBUTION CHIP * 2 Selectable LVCMOS/LVTTL Clock Inputs * 500ps Maximum Output-to-Output Skew * Drives Up to 18 Independent Clock Lines * Maximum Output Frequency of 110MHz * Synchronous Output Enable * Tristatable Outputs * 32-Lead LQFP Packaging * 3.3V VCC Supply Voltage With an output impedance of approximately 7, in both the HIGH and LOW logic states, the output buffers of the MPC947 are ideal for driving series terminated transmission lines. More specifically, each of the 9 MPC947 outputs can drive two series terminated 50 transmission lines. With this capability, the MPC947 has an effective fanout of 1:18 in applications using point-to-point distribution schemes. With this level of fanout, the MPC947 provides enough copies of low skew clocks for high performance synchronous systems, including use as a clock distribution chip for the L2 cache of a PowerPC 620 based system. Two independent LVCMOS/LVTTL compatible clock inputs are available. Designers can take advantage of this feature to provide redundant clock sources or the addition of a test clock into the system design. With the select input pulled HIGH, the TTL_CLK1 input will be selected. All of the control inputs are LVCMOS/LVTTL compatible. The MPC947 provides a synchronous output enable control to allow for starting and stopping of the output clocks. A logic high on the Sync_OE pin will enable all of the outputs. Because this control is synchronized to the input clock, potential output glitching or runt pulse generation is eliminated. In addition, for board level test, the outputs can be tristated via the tristate control pin. A logic LOW applied to the Tristate input will force all of the outputs into high impedance. Note that all of the MPC947 inputs have internal pullup resistors. The MPC947 is fully 3.3V compatible. The 32-lead LQFP package was chosen to optimize performance, board space and cost of the device. The 32-lead LQFP has a 7x7mm body size with a conservative 0.8mm pin spacing. FA SUFFIX 32-LEAD LQFP PACKAGE CASE 873A-02 06/00 (c) Motorola, Inc. 2000 1 REV 4 MPC947 TTL_CLK0 TTL_CLK1 TTL_CLK1_Sel 0 1 9 Q0-Q8 D Sync_OE Tristate Q Figure 1. Logic Diagram VCCO VCCO GND GND GND Q3 Q4 Q5 24 GND Q2 VCCO Q1 GND Q0 VCCO GND 25 26 27 28 23 22 21 20 19 18 17 16 15 14 13 GND Q6 VCCO Q7 GND Q8 VCCO GND FUNCTION TABLES TTL_CLK1_Sel 0 1 Sync_OE 0 1 Tristate 0 1 Input TTL_CLK0 TTL_CLK1 Outputs Disabled Enabled Outputs Tristate Enabled MPC947 29 30 31 32 1 2 3 4 5 6 7 8 12 11 10 9 TTL_CLK1_Sel TTL_CLK0 TTL_CLK1 Tristate VCCI GND Figure 2. 32-Lead Pinout (Top View) TTL_CLK Sync_OE Q Sync_OE Figure 3. Sync_OE Timing Diagram MOTOROLA GND 2 TIMING SOLUTIONS MPC947 ABSOLUTE MAXIMUM RATINGS* Symbol VCC VI IIN TStor Supply Voltage Input Voltage Input Current Storage Temperature Range (CMOS Inputs) -40 Parameter Min -0.3 -0.3 Max 4.6 VDD + 0.3 20 125 Unit V V mA C * Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute-maximum-rated conditions is not implied. DC CHARACTERISTICS (TA = 0 to 70C, VCC = 3.3V 0.3V) Symbol VIH VIL VOH VOL IIN ICC CIN Characteristic Input HIGH Voltage Input LOW Voltage Output HIGH Voltage Output LOW Voltage Input Current Maximum Quiescent Supply Current Input Capacitance 21 2.5 0.4 -100 28 4 Min 2.0 Typ Max 3.6 0.8 Unit V V V V A mA pF IOH = -20mA (Note 1.) IOL = 20mA (Note 1.) Note 2. Condition Cpd Power Dissipation Capacitance 25 pF Per Output 1. The MPC947 can drive 50 transmission lines on the incident edge. Each output drives one 50 parallel terminated transmission line to VTT = VCC/2. Alternately, the device drives up to two 50 series terminated transmission lines per output. 2. IIN current is a result of internal pull-up resistors. AC CHARACTERISTICS (TA = 0 to 70C, VCC = 3.3V 0.3V) Symbol Fmax tpd tsk(o) tsk(pr) tpwo ts th tPZL, tPZH tPLZ, tPHZ Characteristic Maximum Input Frequency Propagation Delay Output-to-Output Skew Part-to-Part Skew Output Pulse Width Setup Time Hold Time Output Enable Time Output Disable Time Sync_OE to Input Clk Input Clk to Sync_OE tCYCLE/2 - 800 0.0 1.0 11 11 1.0 TCLK to Q Min 110 4.75 9.25 500 2.0 tCYCLE/2 + 800 Typ Max Unit MHz ns ps ns ps ns ns ns ns ns 0.8V to 2.0V Condition Note 3. Note 3. Note 3. Notes 3., 4. Note 3., Measured at VCC/2 Notes 3., 5. Notes 3., 5. tr, tf Output Rise/Fall Time 0.2 3. Driving 50 terminated to VCC/2. 4. Part-to-part skew at a given temperature and voltage. 5. Setup and Hold times are relative to the falling edge of the input clock. TIMING SOLUTIONS BR1333 -- Rev 6 3 MOTOROLA MPC947 APPLICATIONS INFORMATION Driving Transmission Lines The MPC947 clock driver was designed to drive high speed signals in a terminated transmission line environment. To provide the optimum flexibility to the user the output drivers were designed to exhibit the lowest impedance possible. With an output impedance of approximately 10 the drivers can drive either parallel or series terminated transmission lines. For more information on transmission lines the reader is referred to application note AN1091 in the Timing Solutions brochure (BR1333/D). In most high performance clock networks point-to-point distribution of signals is the method of choice. In a point-to-point scheme either series terminated or parallel terminated transmission lines can be used. The parallel technique terminates the signal at the end of the line with a 50 resistance to VCC/2. This technique draws a fairly high level of DC current and thus only a single terminated line can be driven by each output of the MPC947 clock driver. For the series terminated case however there is no DC current draw, thus the outputs can drive multiple series terminated lines. Figure 4 illustrates an output driving a single series terminated line vs two series terminated lines in parallel. When taken to its extreme the fanout of the MPC947 clock driver is effectively doubled due to its capability to drive multiple lines. line impedances. The voltage wave launched down the two lines will equal: VL = VS ( Zo / Rs + Ro +Zo) = 3.0 (25/53.5) = 1.40V At the load end the voltage will double, due to the near unity reflection coefficient, to 2.8V. It will then increment towards the quiescent 3.0V in steps separated by one round trip delay (in this case 4.0ns). 3.0 OutA tD = 3.8956 OutB tD = 3.9386 2.5 VOLTAGE (V) 2.0 In 1.5 1.0 0.5 0 2 4 6 8 TIME (nS) 10 12 14 MPC947 OUTPUT BUFFER IN 7 RS = 43 ZO = 50 OutA Figure 5. Single versus Dual Waveforms Since this step is well above the threshold region it will not cause any false clock triggering, however designers may be uncomfortable with unwanted reflections on the line. To better match the impedances when driving multiple lines the situation in Figure 6 should be used. In this case the series terminating resistors are reduced such that when the parallel combination is added to the output buffer impedance the line impedance is perfectly matched. MPC947 OUTPUT BUFFER 7 RS = 36 ZO = 50 MPC947 OUTPUT BUFFER IN 7 RS = 43 ZO = 50 OutB0 RS = 43 ZO = 50 OutB1 RS = 36 ZO = 50 Figure 4. Single versus Dual Transmission Lines The waveform plots of Figure 5 show the simulation results of an output driving a single line vs two lines. In both cases the drive capability of the MPC947 output buffers is more than sufficient to drive 50 transmission lines on the incident edge. Note from the delay measurements in the simulations a delta of only 43ps exists between the two differently loaded outputs. This suggests that the dual line driving need not be used exclusively to maintain the tight output-to-output skew of the MPC947. The output waveform in Figure 5 shows a step in the waveform, this step is caused by the impedance mismatch seen looking into the driver. The parallel combination of the 43 series resistor plus the output impedance does not match the parallel combination of the 7 + 36 k 36 = 50 k 50 25 = 25 Figure 6. Optimized Dual Line Termination SPICE level output buffer models are available for engineers who want to simulate their specific interconnect schemes. In addition IV characteristics are in the process of being generated to support the other board level simulators in general use. MOTOROLA 4 TIMING SOLUTIONS MPC947 OUTLINE DIMENSIONS FA SUFFIX LQFP PACKAGE CASE 873A-02 ISSUE A A A1 32 25 4X 0.20 (0.008) AB T-U Z 1 -T- B B1 8 -U- V P DETAIL Y 17 AE V1 AE DETAIL Y 9 -Z- 9 S1 S 4X 0.20 (0.008) AC T-U Z G -AB- SEATING PLANE DETAIL AD -AC- BASE METAL F 8X M_ R CE SECTION AE-AE X DETAIL AD TIMING SOLUTIONS BR1333 -- Rev 6 GAUGE PLANE 0.250 (0.010) H W K Q_ 5 EE EE EE EE N D 0.20 (0.008) M AC T-U Z 0.10 (0.004) AC NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE -AB- IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS -T-, -U-, AND -Z- TO BE DETERMINED AT DATUM PLANE -AB-. 5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE -AC-. 6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.250 (0.010) PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -AB-. 7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. DAMBAR PROTRUSION SHALL NOT CAUSE THE D DIMENSION TO EXCEED 0.520 (0.020). 8. MINIMUM SOLDER PLATE THICKNESS SHALL BE 0.0076 (0.0003). 9. EXACT SHAPE OF EACH CORNER MAY VARY FROM DEPICTION. MILLIMETERS MIN MAX 7.000 BSC 3.500 BSC 7.000 BSC 3.500 BSC 1.400 1.600 0.300 0.450 1.350 1.450 0.300 0.400 0.800 BSC 0.050 0.150 0.090 0.200 0.500 0.700 12_ REF 0.090 0.160 0.400 BSC 1_ 5_ 0.150 0.250 9.000 BSC 4.500 BSC 9.000 BSC 4.500 BSC 0.200 REF 1.000 REF INCHES MIN MAX 0.276 BSC 0.138 BSC 0.276 BSC 0.138 BSC 0.055 0.063 0.012 0.018 0.053 0.057 0.012 0.016 0.031 BSC 0.002 0.006 0.004 0.008 0.020 0.028 12_ REF 0.004 0.006 0.016 BSC 1_ 5_ 0.006 0.010 0.354 BSC 0.177 BSC 0.354 BSC 0.177 BSC 0.008 REF 0.039 REF J DIM A A1 B B1 C D E F G H J K M N P Q R S S1 V V1 W X -T-, -U-, -Z- MOTOROLA MPC947 NOTES MOTOROLA 6 TIMING SOLUTIONS MPC947 NOTES TIMING SOLUTIONS BR1333 -- Rev 6 7 MOTOROLA MPC947 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217. 1-303-675-2140 or 1-800-441-2447 Technical Information Center: 1-800-521-6274 JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center, 3-20-1, Minami-Azabu. Minato-ku, Tokyo 106-8573 Japan. 81-3-3440-3569 ASIA / PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre, 2, Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong. 852-26668334 HOME PAGE: http://www.motorola.com/semiconductors/ MOTOROLA 8 TIMING SOLUTIONS MPC947/D |
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